`include "C:\Users\lenovo\Desktop\Files\Linear_RISCV\LR_ver_0\src\include\include.vh"
module 	imm_ohc_u(
    input	    [6:0]			opcode_i,
    output	reg [5:0]			imm_type_ohc
);
    always@(*)begin
        imm_type_ohc[0]=
                        ((opcode_i==`INST_RV32I_OPCODE_IMM))|
                        ((opcode_i==`INST_RV32DI_OPCODE_LOAD))|
                        ((opcode_i==`INST_RV64I_OPCODE_LOAD))|
                        ((opcode_i==`INST_RV64I_OPCODE_SHIFT_D))|
                        ((opcode_i==`INST_RV64I_OPCODE_SHIFT_W))|
                        ((opcode_i==`INST_RV32I_OPCODE_FENCE))|
                        ((opcode_i==`INST_RV32I_OPCODE_CSR));//I type, imm&load
        imm_type_ohc[1]=((opcode_i==`INST_RV32DI_OPCODE_STORE));//S type, Store 
        imm_type_ohc[2]=((opcode_i==`INST_RV32I_OPCODE_BRANCH));//B type, Branch 
        imm_type_ohc[3]=((opcode_i==`INST_RV32I_OPCODE_JAL));
        imm_type_ohc[4]=((opcode_i==`INST_RV32I_OPCODE_JALR));//J type,Jump
        imm_type_ohc[5]=((opcode_i==`INST_RV32I_OPCODE_AUIPC))|
                        ((opcode_i==`INST_RV32I_OPCODE_LUI));//U type ,Utra imm
    end
endmodule